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electronics [2013/12/10 20:34]
pereira [Trigger Box]
electronics [2013/12/10 20:48]
pereira
Line 26: Line 26:
 ===== Trigger ===== ===== Trigger =====
 The main purpose of the trigger is to implement a coincidence between the S800 focal-plane fast timing scintillator [[Detectors#Plastic scintillators|E1]] and a secondary detector principally located at the target location. This coincidence is often a mandatory requirement when the trigger rate of the S800 alone (S800 singles) is too high for the data acquisition and the resulting dead time is prohibitive.  The main purpose of the trigger is to implement a coincidence between the S800 focal-plane fast timing scintillator [[Detectors#Plastic scintillators|E1]] and a secondary detector principally located at the target location. This coincidence is often a mandatory requirement when the trigger rate of the S800 alone (S800 singles) is too high for the data acquisition and the resulting dead time is prohibitive. 
 +
 +This section is divided in the following subsections:
 +
 +  - Ordered List ItemSchematics
 +   -- Trigger Box
 +     - Busy Scheme
 +   * Time stamping Scheme
 +   * Gate Generation
 +   * Inspect Channel
 +* Trigger Module
 +   * CAMAC Commands
 +   * Inputs and Outputs
 +   * FPGA firmware
 +* Time Stamping
 +Configuration for S800 in tandem with other detectors
 +4 Begin sequence
 +5 Scalers and dead time
 +
 +
 +
  
 The trigger logic is implemented in a LeCroy 2367 Universal Logic Module (ULM) by means of its XC4000E Xilinx FPGA. The main motivations for implementing the trigger logic in an FPGA driven module are the following:  The trigger logic is implemented in a LeCroy 2367 Universal Logic Module (ULM) by means of its XC4000E Xilinx FPGA. The main motivations for implementing the trigger logic in an FPGA driven module are the following: 
electronics.txt ยท Last modified: 2023/10/16 08:25 by noji