Differences

This shows you the differences between two versions of the page.

--- trigger [2013/12/11 14:12]
pereira
+++ trigger [2013/12/11 14:15]
pereira [Trigger Schematic]
@@ Line 14: / Line 14: @@
-====== Trigger Schematic ======
+====== Trigger schematic ======
 The trigger schematic is shown on the Graphical User Interface (GUI) displayed in the figure below.
@@ Line 28: / Line 28: @@
 Since more than one trigger source can be selected, it is possible that more than one pulse is generated at the output of the trigger box, depending on the timing and shape of the source signals. When both downscaled singles and coincidences are selected for instance, the "Raw trigger" output of the trigger box may generate two pulses for a single event. A scaler connected to the "Raw trigger" output will therefore not reflect the true number of events. For this reason scalers are also connected to individual inputs of the trigger box (for more details, check the section [[Trigger#Scalers and dead time|Scalers and dead time]]). A trigger register word (bit pattern) is written at each occurrence of a live trigger signal. This word is the first being read out from the trigger module, prior to the time stamp ([[check trigger packet tag 0x2367 in the DAQ section for more information]]).
-More details about the trigger box module and its FPGA schematics can be found [[here]].
+More details about the trigger box module and its FPGA schematics can be found in section [[Trigger#Trigger module|Trigger module]].

S800 Documentation