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trigger [2013/12/11 15:19]
pereira [CAMAC commands] 		trigger [2013/12/11 15:21]
pereira [CAMAC commands]
Line 55: Line 55:
 The table with a lists of the CAMAC commands recognized by the trigger module and their signification can be found [[CAMAC commands | here]]. The table with a lists of the CAMAC commands recognized by the trigger module and their signification can be found [[CAMAC commands | here]].
  
- 
-^ F ^ A ^ Direction ^ F ^ A ^ Direction ^ Data ^ 
-| 0 | 0  | Read | 16 | 0  | Write | S800 Gate & Delay (delay) | 
-| 0 | 1  | Read | 16 | 1  | Write | S800 Gate & Delay (width) | 
-| 0 | 2  | Read | 16 | 2  | Write | Secondary Gate & Delay (delay) | 
-| 0 | 3  | Read | 16 | 3  | Write | Secondary Gate & Delay (width) | 
-| 0 | 4  | Read | 16 | 4  | Write | S800 Delay (delay) | 
-| 0 | 5  | Read | 16 | 5  | Write | Coincidence Gate (width) | 
-| 0 | 6  | Read | 16 | 6  | Write | Secondary Delay (delay) | 
-| 0 | 7  | Read | 16 | 7  | Write | Bypasses (bit pattern) | 
-| 0 | 8  | Read | 16 | 8  | Write | S800 Downscaler (factor) | 
-| 0 | 9  | Read | 16 | 9  | Write | Secondary Downscaler (factor) | 
-| 0 | 10 | Read | 16 | 10 | Write | Trigger Box (bit pattern) | 
-| 0 | 11 | Read | 16 | 11 | Write | Go signal (bit) | 
-| 0 | 12 | Read | 16 | 12 | Write | External Time Stamp Clock (bit 0)and External Time Stamp Latch (bit 1) | 
-| 0 | 14 | Read |    |    |       | Signature 1 (0x5800) | 
-| 0 | 15 | Read |    |    |       | Signature 2 (0x2367) | 
-| 1 | 0  | Read | 17 | 0  | Write | Inspect Channel 1 (wire) | 
-| 1 | 1  | Read | 17 | 1  | Write | Inspect Channel 2 (wire) | 
-| 1 | 2  | Read | 17 | 2  | Write | Inspect Channel 3 (wire) |  
-| 1 | 3  | Read | 17 | 3  | Write | Inspect Channel 4 (wire) | 
-| 2 | 0  | Read | 18 | 0  | Write | ADC Gate (width) | 
-| 2 | 1  | Read | 18 | 1  | Write | QDC Gate (width) | 
-| 2 | 2  | Read | 18 | 2  | Write | TDC Gate (width) | 
-| 2 | 3  | Read | 18 | 3  | Write | Coincidence Register Gate (width) | 
-| 3 | 0  | Read |    |    |       | Trigger Box Register (bit pattern) | 
-| 3 | 1  | Read |    |    |       | Time Stamp (bits 0-15) | 
-| 3 | 2  | Read |    |    |       | Time Stamp (bits 16-31) | 
-| 3 | 3  | Read |    |    |       | Time Stamp (bits 32-47) | 
-| 3 | 4  | Read |    |    |       | Time Stamp (bits 48-63) |  
  
 ==Inputs and outputs== ==Inputs and outputs==
Line 539: Line 509:
   endmodule   endmodule
  
-==== CAMAC commands ==== 
  
-The following table lists the CAMAC codes recognized by the trigger module and their signification.  
  
  
-{|class="wikitable" + 
-| F + 
-| A + 
-| Direction + 
-| F +^ F ^ A ^ Direction ^ F ^ A ^ Direction ^ Data ^ 
-| A +| 0 | 0  | Read | 16 | 0  | Write | S800 Gate & Delay (delay) | 
-| Direction +| 0 | 1  | Read | 16 | 1  | Write | S800 Gate & Delay (width) | 
-| Data +| 0 | 2  | Read | 16 | 2  | Write | Secondary Gate & Delay (delay) | 
-|- +| 0 | 3  | Read | 16 | 3  | Write | Secondary Gate & Delay (width) | 
-| 0 +| 0 | 4  | Read | 16 | 4  | Write | S800 Delay (delay) | 
-| 0 +| 0 | 5  | Read | 16 | 5  | Write | Coincidence Gate (width) | 
-| Read +| 0 | 6  | Read | 16 | 6  | Write | Secondary Delay (delay) | 
-| 16 +| 0 | 7  | Read | 16 | 7  | Write | Bypasses (bit pattern) | 
-| 0 +| 0 | 8  | Read | 16 | 8  | Write | S800 Downscaler (factor) | 
-| Write +| 0 | 9  | Read | 16 | 9  | Write | Secondary Downscaler (factor) | 
-| S800 Gate & Delay (delay) +| 0 | 10 | Read | 16 | 10 | Write | Trigger Box (bit pattern) | 
-|- +| 0 | 11 | Read | 16 | 11 | Write | Go signal (bit) | 
-| 0 +| 0 | 12 | Read | 16 | 12 | Write | External Time Stamp Clock (bit 0)and External Time Stamp Latch (bit 1) | 
-| 1 +| 0 | 14 | Read |    |    |       | Signature 1 (0x5800) | 
-| Read +| 0 | 15 | Read |    |    |       | Signature 2 (0x2367) | 
-| 16 +| 1 | 0  | Read | 17 | 0  | Write | Inspect Channel 1 (wire) | 
-| 1 +| 1 | 1  | Read | 17 | 1  | Write | Inspect Channel 2 (wire) | 
-| Write +| 1 | 2  | Read | 17 | 2  | Write | Inspect Channel 3 (wire) |  
-| S800 Gate & Delay (width) +| 1 | 3  | Read | 17 | 3  | Write | Inspect Channel 4 (wire) | 
-|- +| 2 | 0  | Read | 18 | 0  | Write | ADC Gate (width) | 
-| 0 +| 2 | 1  | Read | 18 | 1  | Write | QDC Gate (width) | 
-| 2 +| 2 | 2  | Read | 18 | 2  | Write | TDC Gate (width) | 
-| Read +| 2 | 3  | Read | 18 | 3  | Write | Coincidence Register Gate (width) | 
-| 16 +| 3 | 0  | Read |    |    |       | Trigger Box Register (bit pattern) | 
-| 2 +| 3 | 1  | Read |    |    |       | Time Stamp (bits 0-15) | 
-| Write +| 3 | 2  | Read |    |    |       | Time Stamp (bits 16-31) | 
-| Secondary Gate & Delay (delay) +| 3 | 3  | Read |    |    |       | Time Stamp (bits 32-47) | 
-|- +| 3 | 4  | Read |    |    |       | Time Stamp (bits 48-63) |  
-| 0 +
-| 3 +
-| Read +
-| 16 +
-| 3 +
-| Write +
-| Secondary Gate & Delay (width) +
-|- +
-| 0 +
-| 4 +
-| Read +
-| 16 +
-| 4 +
-| Write +
-| S800 Delay (delay) +
-|- +
-| 0 +
-| 5 +
-| Read +
-| 16 +
-| 5 +
-| Write +
-| Coincidence Gate (width) +
-|- +
-| 0 +
-| 6 +
-| Read +
-| 16 +
-| 6 +
-| Write +
-| Secondary Delay (delay) +
-|- +
-| 0 +
-| 7 +
-| Read +
-| 16 +
-| 7 +
-| Write +
-| Bypasses (bit pattern) +
-|- +
-| 0 +
-| 8 +
-| Read +
-| 16 +
-| 8 +
-| Write +
-| S800 Downscaler (factor) +
-|- +
-| 0 +
-| 9 +
-| Read +
-| 16 +
-| 9 +
-| Write +
-| Secondary Downscaler (factor) +
-|- +
-| 0 +
-| 10 +
-| Read +
-| 16 +
-| 10 +
-| Write +
-| Trigger Box (bit pattern) +
-|- +
-| 0 +
-| 11 +
-| Read +
-| 16 +
-| 11 +
-| Write +
-| Go signal (bit) +
-|- +
-| 0 +
-| 12 +
-| Read +
-| 16 +
-| 12 +
-| Write +
-| External Time Stamp Clock (bit 0) +
-and External Time Stamp Latch (bit 1) +
-|- +
-| 0 +
-| 14 +
-| Read +
-|  +
-|  +
-| +
-| Signature 1 (0x5800) +
-|- +
-| 0 +
-| 15 +
-| Read +
-|  +
-|  +
-| +
-| Signature 2 (0x2367) +
-|- +
-| 1 +
-| 0 +
-| Read +
-| 17 +
-| 0 +
-| Write +
-| Inspect Channel 1 (wire) +
-|- +
-| 1 +
-| 1 +
-| Read +
-| 17 +
-| 1 +
-| Write +
-| Inspect Channel 2 (wire) +
-|- +
-| 1 +
-| 2 +
-| Read +
-| 17 +
-| 2 +
-| Write +
-| Inspect Channel 3 (wire) +
-|- +
-| 1 +
-| 3 +
-| Read +
-| 17 +
-| 3 +
-| Write +
-| Inspect Channel 4 (wire) +
-|- +
-| 2 +
-| 0 +
-| Read +
-| 18 +
-| 0 +
-| Write +
-| ADC Gate (width) +
-|- +
-| 2 +
-| 1 +
-| Read +
-| 18 +
-| 1 +
-| Write +
-| QDC Gate (width) +
-|- +
-| 2 +
-| 2 +
-| Read +
-| 18 +
-| 2 +
-| Write +
-| TDC Gate (width) +
-|- +
-| 2 +
-| 3 +
-| Read +
-| 18 +
-| 3 +
-| Write +
-| Coincidence Register Gate (width) +
-|- +
-| 3 +
-| 0 +
-| Read +
-| +
-| +
-| +
-| Trigger Box Register (bit pattern) +
-|- +
-| 3 +
-| 1 +
-| Read +
-| +
-| +
-| +
-| Time Stamp (bits 0-15) +
-|- +
-| 3 +
-| 2 +
-| Read +
-| +
-| +
-| +
-| Time Stamp (bits 16-31) +
-|- +
-| 3 +
-| 3 +
-| Read +
-| +
-| +
-| +
-| Time Stamp (bits 32-47) +
-|- +
-| 3 +
-| 4 +
-| Read +
-| +
-| +
-| +
-| Time Stamp (bits 48-63) +
-|}+
  
  
trigger.txt · Last modified: 2023/10/24 16:47 by swartzj

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