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trigger [2013/12/11 15:21] pereira [CAMAC commands] |
trigger [2013/12/11 15:36] pereira [Inputs and outputs] |
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==== CAMAC commands ==== | ==== CAMAC commands ==== | ||
- | The table with a lists of the CAMAC commands recognized by the trigger module and their signification can be found [[CAMAC commands | here]]. | + | A table with the list of the CAMAC commands recognized by the trigger module and their signification can be found [[CAMAC commands | here]]. |
- | ==Inputs and outputs== | + | ==== Inputs and outputs |
- | The following | + | A table with the list of inputs/outputs |
- | + | ||
- | {| class=" | + | |
- | | Pin | + | |
- | | Assignment | + | |
- | | Pin | + | |
- | | Assignment | + | |
- | | Pin | + | |
- | | Assignment | + | |
- | | Pin | + | |
- | | Assignment | + | |
- | |- | + | |
- | | A1 (in) | + | |
- | | S800 source | + | |
- | | B1 (out) | + | |
- | | Raw trigger | + | |
- | | C1 (in) | + | |
- | | Busy 1 | + | |
- | | D1 (out) | + | |
- | | S800 source | + | |
- | |- | + | |
- | | A2 (in) | + | |
- | | Secondary source | + | |
- | | B2 (out) | + | |
- | | Live trigger | + | |
- | | C2 (in) | + | |
- | | Busy 2 | + | |
- | | D2 (out) | + | |
- | | Secondary source | + | |
- | |- | + | |
- | | A3 (in) | + | |
- | | External 1 source | + | |
- | | B3 (out) | + | |
- | | ADC gate | + | |
- | | C3 (in) | + | |
- | | Busy 3 | + | |
- | | D3 (out) | + | |
- | | External 1 source | + | |
- | |- | + | |
- | | A4 (in) | + | |
- | | External 2 source | + | |
- | | B4 (out) | + | |
- | | QDC gate | + | |
- | | C4 (in) | + | |
- | | Busy 4 | + | |
- | | D4 (out) | + | |
- | | External 2 source | + | |
- | |- | + | |
- | | A5 (in) | + | |
- | | Clear busy | + | |
- | | B5 (out) | + | |
- | | TDC start | + | |
- | | C5 (in) | + | |
- | | Busy 5 | + | |
- | | D5 (out) | + | |
- | | S800 trigger | + | |
- | |- | + | |
- | | A6 (in) | + | |
- | | Clear module | + | |
- | | B6 (out) | + | |
- | | Trigger register gate | + | |
- | | C6 (in) | + | |
- | | Busy 6 | + | |
- | | D6 (out) | + | |
- | | Coincidence trigger | + | |
- | |- | + | |
- | | A7 (in) | + | |
- | | Gretina sync | + | |
- | | B7 (out) | + | |
- | | | + | |
- | | C7 (in) | + | |
- | | Busy 7 | + | |
- | | D7 (out) | + | |
- | | External 1 trigger | + | |
- | |- | + | |
- | | A8 (in) | + | |
- | | Time stamp clock | + | |
- | | B8 (out) | + | |
- | | Live trigger | + | |
- | | C8 (in) | + | |
- | | Time stamp latch | + | |
- | | D8 (out) | + | |
- | | External 2 trigger | + | |
- | |- | + | |
- | | | + | |
- | | | + | |
- | | B9 (out) | + | |
- | | Inspect 1 | + | |
- | | C9 (out) | + | |
- | | Time stamp clock | + | |
- | | D9 (out) | + | |
- | | Secondary trigger | + | |
- | |- | + | |
- | | | + | |
- | | | + | |
- | | B10 (out) | + | |
- | | Inspect 2 | + | |
- | | C10 (out) | + | |
- | | Time stamp latch | + | |
- | | D10 (out) | + | |
- | | Raw trigger | + | |
- | |- | + | |
- | | | + | |
- | | | + | |
- | | B11 (out) | + | |
- | | Inspect 3 | + | |
- | | C11 (out) | + | |
- | | | + | |
- | | D11 (out) | + | |
- | | Live trigger | + | |
- | |- | + | |
- | | | + | |
- | | | + | |
- | | B12 (out) | + | |
- | | Inspect 4 | + | |
- | | C12 (out) | + | |
- | | | + | |
- | | D12 (out) | + | |
- | | Raw pulser | + | |
- | |- | + | |
- | | | + | |
- | | | + | |
- | | B13 (out) | + | |
- | | Fast clear | + | |
- | | C13 (out) | + | |
- | | | + | |
- | | D13 (out) | + | |
- | | Live pulser | + | |
- | |- | + | |
- | | | + | |
- | | | + | |
- | | B14 (out) | + | |
- | | | + | |
- | | C14 (out) | + | |
- | | | + | |
- | | D14 (out) | + | |
- | | Fast clear | + | |
- | |- | + | |
- | | | + | |
- | | | + | |
- | | B15 (out) | + | |
- | | Go | + | |
- | | C15 (out) | + | |
- | | | + | |
- | | D15 (out) | + | |
- | | 10 Hz | + | |
- | |- | + | |
- | | | + | |
- | | | + | |
- | | B16 (out) | + | |
- | | Time stamp clock | + | |
- | | C16 (out) | + | |
- | | | + | |
- | | D16 (out) | + | |
- | | 1 Hz | + | |
- | |} | + | |
==FPGA firmware== | ==FPGA firmware== | ||
Line 548: | Line 393: | ||
- | ==== Inputs and outputs ==== | ||
- | The following table lists the inputs and outputs to/from the trigger module and their assignment. | ||
- | Pin Assignment | + | |
- | A1 (in) S800 source | + | {| class=" |
- | A2 (in) Secondary source | + | | Pin |
- | A3 (in) External 1 source | + | | Assignment |
- | A4 (in) External 2 source | + | | Pin |
- | A5 (in) Clear busy B5 (out) TDC start C5 (in) Busy 5 D5 (out) S800 trigger | + | | Assignment |
- | A6 (in) Clear module | + | | Pin |
- | A7 (in) Gretina sync B7 (out) | + | | Assignment |
- | A8 (in) Time stamp clock B8 (out) Live trigger | + | | Pin |
- | B9 (out) Inspect 1 C9 (out) Time stamp clock D9 (out) Secondary trigger | + | | Assignment |
- | B10 (out) Inspect 2 C10 (out) Time stamp latch D10 (out) Raw trigger | + | |- |
- | B11 (out) Inspect 3 C11 (out) | + | | A1 (in) |
- | B12 (out) Inspect 4 C12 (out) | + | | S800 source |
- | B13 (out) Fast clear C13 (out) | + | | B1 (out) |
- | B14 (out) | + | | Raw trigger |
- | B15 (out) Go C15 (out) | + | | C1 (in) |
- | B16 (out) Time stamp clock C16 (out) | + | | Busy 1 |
+ | | D1 (out) | ||
+ | | S800 source | ||
+ | |- | ||
+ | | A2 (in) | ||
+ | | Secondary source | ||
+ | | B2 (out) | ||
+ | | Live trigger | ||
+ | | C2 (in) | ||
+ | | Busy 2 | ||
+ | | D2 (out) | ||
+ | | Secondary source | ||
+ | |- | ||
+ | | A3 (in) | ||
+ | | External 1 source | ||
+ | | B3 (out) | ||
+ | | ADC gate | ||
+ | | C3 (in) | ||
+ | | Busy 3 | ||
+ | | D3 (out) | ||
+ | | External 1 source | ||
+ | |- | ||
+ | | A4 (in) | ||
+ | | External 2 source | ||
+ | | B4 (out) | ||
+ | | QDC gate | ||
+ | | C4 (in) | ||
+ | | Busy 4 | ||
+ | | D4 (out) | ||
+ | | External 2 source | ||
+ | |- | ||
+ | | A5 (in) | ||
+ | | Clear busy | ||
+ | | B5 (out) | ||
+ | | TDC start | ||
+ | | C5 (in) | ||
+ | | Busy 5 | ||
+ | | D5 (out) | ||
+ | | S800 trigger | ||
+ | |- | ||
+ | | A6 (in) | ||
+ | | Clear module | ||
+ | | B6 (out) | ||
+ | | Trigger register gate | ||
+ | | C6 (in) | ||
+ | | Busy 6 | ||
+ | | D6 (out) | ||
+ | | Coincidence trigger | ||
+ | |- | ||
+ | | A7 (in) | ||
+ | | Gretina sync | ||
+ | | B7 (out) | ||
+ | | | ||
+ | | C7 (in) | ||
+ | | Busy 7 | ||
+ | | D7 (out) | ||
+ | | External 1 trigger | ||
+ | |- | ||
+ | | A8 (in) | ||
+ | | Time stamp clock | ||
+ | | B8 (out) | ||
+ | | Live trigger | ||
+ | | C8 (in) | ||
+ | | Time stamp latch | ||
+ | | D8 (out) | ||
+ | | External 2 trigger | ||
+ | |- | ||
+ | | | ||
+ | | | ||
+ | | B9 (out) | ||
+ | | Inspect 1 | ||
+ | | C9 (out) | ||
+ | | Time stamp clock | ||
+ | | D9 (out) | ||
+ | | Secondary trigger | ||
+ | |- | ||
+ | | | ||
+ | | | ||
+ | | B10 (out) | ||
+ | | Inspect 2 | ||
+ | | C10 (out) | ||
+ | | Time stamp latch | ||
+ | | D10 (out) | ||
+ | | Raw trigger | ||
+ | |- | ||
+ | | | ||
+ | | | ||
+ | | B11 (out) | ||
+ | | Inspect 3 | ||
+ | | C11 (out) | ||
+ | | | ||
+ | | D11 (out) | ||
+ | | Live trigger | ||
+ | |- | ||
+ | | | ||
+ | | | ||
+ | | B12 (out) | ||
+ | | Inspect 4 | ||
+ | | C12 (out) | ||
+ | | | ||
+ | | D12 (out) | ||
+ | | Raw pulser | ||
+ | |- | ||
+ | | | ||
+ | | | ||
+ | | B13 (out) | ||
+ | | Fast clear | ||
+ | | C13 (out) | ||
+ | | | ||
+ | | D13 (out) | ||
+ | | Live pulser | ||
+ | |- | ||
+ | | | ||
+ | | | ||
+ | | B14 (out) | ||
+ | | | ||
+ | | C14 (out) | ||
+ | | | ||
+ | | D14 (out) | ||
+ | | Fast clear | ||
+ | |- | ||
+ | | | ||
+ | | | ||
+ | | B15 (out) | ||
+ | | Go | ||
+ | | C15 (out) | ||
+ | | | ||
+ | | D15 (out) | ||
+ | | 10 Hz | ||
+ | |- | ||
+ | | | ||
+ | | | ||
+ | | B16 (out) | ||
+ | | Time stamp clock | ||
+ | | C16 (out) | ||
+ | | | ||
+ | | D16 (out) | ||
+ | | 1 Hz | ||
+ | |} | ||
+ | |||
+ | |||
==== FPGA firmware ==== | ==== FPGA firmware ==== |