Differences

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--- trigger [2013/12/26 13:32]
pereira [Time stamping]
+++ trigger [2015/10/20 11:47]
pereira [Scalers and dead time]
@@ Line 36: / Line 36: @@
 ===== Trigger schematics =====
-The trigger schematic is shown on the Graphical User Interface (GUI) displayed in the figure below.
+The trigger schematic is shown on the Graphical User Interface (GUI) displayed in the figure below. The GUI is automatically displayed when clicking in the Readout icon of the [[software|u6pc5]] desktop.
 {{:wiki:TriggerGUI.png?900|Trigger schematics of the S800}}
@@ Line 77: / Line 77: @@
 ==== Inputs and outputs ====
-A table with the list of inputs/outputs channels to/from the trigger module and their assignment can be found [[Inputs and outputs | here]].
+The list of inputs/outputs channels to/from the ULM trigger module, and their assignment, is shown in the bale below:
+^ Pin     ^ Assignment        ^ Pin       ^ Assignment            ^ Pin       ^ Assignment       ^ Pin       ^ Assignment |
+^ A1 (in) | S800 source       ^ B1 (out)  | Raw trigger           ^ C1 (in)   | Busy 1           ^ D1 (out)  | S800 source |
+^ A2 (in) | Secondary source  ^ B2 (out)  | Live trigger          ^ C2 (in)   | Busy 2           ^ D2 (out)  | Secondary source |
+^ A3 (in) | External 1 source ^ B3 (out)  | ADC gate              ^ C3 (in)   | Busy 3           ^ D3 (out)  | External 1 source |
+^ A4 (in) | External 2 source ^ B4 (out)  | QDC gate              ^ C4 (in)   | Busy 4           ^ D4 (out)  | External 2 source |
+^ A5 (in) | Clear busy        ^ B5 (out)  | TDC start             ^ C5 (in)   | Busy 5           ^ D5 (out)  | S800 trigger |
+^ A6 (in) | Clear module      ^ B6 (out)  | Trigger register gate ^ C6 (in)   | Busy 6           ^ D6 (out)  | Coincidence trigger |
+^ A7 (in) | Gretina sync      ^ B7 (out)  |                       ^ C7 (in)   | Busy 7           ^ D7 (out)  | External 1 trigger |
+^ A8 (in) | Time stamp clock  ^ B8 (out)  | Live trigger          ^ C8 (in)   | Time stamp latch ^ D8 (out)  | External 2 trigger|
+^         |                   ^ B9 (out)  | Inspect 1             ^ C9 (out)  | Time stamp clock ^ D9 (out)  | Secondary trigger |
+^         |                   ^ B10 (out) | Inspect 2             ^ C10 (out) | Time stamp latch ^ D10 (out) | Raw trigger |
+^         |                   ^ B11 (out) | Inspect 3             ^ C11 (out) |                  ^ D11 (out) | Live trigger |
+^         |                   ^ B12 (out) | Inspect 4             ^ C12 (out) |                  ^ D12 (out) | Raw pulser |
+^         |                   ^ B13 (out) | Fast clear            ^ C13 (out) |                  ^ D13 (out) | Live pulser |
+^         |                   ^ B14 (out) |                       ^ C14 (out) |                  ^ D14 (out) | Fast clear |
+^         |                   ^ B15 (out) | Go                    ^ C15 (out) |                  ^ D15 (out) | 10 Hz |
+^         |                   ^ B16 (out) | Time stamp clock      ^ C16 (out) |                  ^ D16 (out) | 1 Hz |
 ==== FPGA firmware ====
 The firmware of the trigger module is shown in the following files. The {{:wiki:Usbtrig.pdf|PDF file}} contains the schematic sheets, used for most of the design. The [[Verilog Trigger|Verilog file]] contains the block dealing with CAMAC communications.
@@ Line 157: / Line 174: @@
 In addition, scalers are connected to the raw and live trigger signals. For the determination of the dead time, both a free running and vetoed 10 kHz pulser signal are also connected to scalers. This is the preferred method because the pulser is not subject to possible double triggering effects like the raw trigger.
-The list below is a direct copy of the scaler description file for the s800. This file maps channel names to channel numbers, and in addition determines the layout.
+The remining 16 scaler input channels (pins 17 to 32 in module) are connected to a **16-channel CFD CAEN C808**, which sends the signals from the S800 detectors (**E1 up,** **E1 down**, **CRDC1**, **CRDC2**, **OBJ_SCI**, **A1900 SCI**, and **OR Hodoscope**).
+A list of scaler channels can be found [[Scaler Channel Description|here]].
-^ Channel name ^ Channel number ^ Channel name ^ Channel number |
-| Live.Trigger  ^ 10 | Raw.Trigger    ^ 9 |
-| Live.Clock    ^ 12 | Raw.Clock      ^ 11 |
-| S800.Source   ^ 0 | S800.Trigger   ^ 4 |
-| Second.Source ^ 1 | Second.Trigger ^ 8 |
-| Ext1.Source   ^ 2 | Ext1.Trigger   ^ 6 |
-| Ext2.Source   ^ 3 | Ext2.Trigger   ^ 7 |
-| Coinc.Trigger ^ 5 |                ^  |
-| E1.Up         ^ 16 | E1.Down        ^ 17 |
-| E2.Up         ^ 18 | E2.Down        ^ 19 |
-| CRDC1.Anode   ^ 22 | CRDC2.Anode    ^ 23 |
-| TPPAC1        ^ 27 | TPPAC2         ^ 28 |
-| OBJ.Scint     ^ 24 | XFP.Scint      ^ 25 |
-| TAR.Scint     ^ 26 | XFP.Scint      ^ 25 |
-| S800.Source   ^ 0 | OBJ.Si         ^ 26 |
-| S800.Source   ^ 0 | OBJ.Scint      ^ 24 |
-| S800.Source   ^ 0 | XFP.Scint      ^ 25 |
-| Hodo.OR       ^ 30 |                ^  |

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