AT-TPC Wiki

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====== Deprecated Page ======
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**This page is no longer maintained** For up to date information, please see [[https://project-get.cea.fr/|New Wiki]].
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The electronics chain for the AT-TPC readout are being developed in conjunction with a number of outside collaborators, including (but not limited to): \\
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Le Centre d'Etudes Nucléaires de Bordeaux Gradignan (CENBG) \\ 
Grand Accelerateur National d’Ions Lourds (GANIL) \\ 
Institute of Research into the Fundamental Laws of the Universe (IRFU) \\ 
National Superconducting Cyclotron Laboratory (NSCL) \\ 

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An ANR proposal for the research and development required to design & test the electronics chain has been submitted to cover the work to be done at the French institutions.  A copy of this proposal is linked {{anr_get_final.pdf | here }}.

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{{get_logo_small.jpg}}
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=========   eDoc server  ====================
[[https://project-actar-get.cea.fr/Groups/100_todolist/200_wp2_front_end_el/100_aget/aget_version1_docume3535| AGET first submission (April 9, 2010)]]
=========   DOCUMENTATION TEMPLATE  ====================
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To be standard on all laboratories, two template are proposed to write requirement for each board and software and to define physical interface between board and how to communicate with each others. In each document, there is examples. \\
:-){{temp1.doc| interface template }}.\\
:-){{temp2.doc| requirement template }}.\\

**Conceptual Design report**\\

The goal of a CDR is to have all requirement in terms of physics and technical aspect.
You must present all possible solution and what to do to validate them. You do not have to go deeply on the implementation of the solution. The implementation concerns the TDR (technical design report) which will be written as soon as we got a prototype, validating one unique solution.\\
8-O[[CDR|CDR link]]\\

====== General Electronics for TPC's (GET) ======
{{getoverviewdiagram_dec08.jpg}}\\

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{{SystemEnglish.png|system}}\\
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{{GET_Board_ID.pdf  | Proposal for board identification}}
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{{GET_MTCA_architecture.pdf | GET and MicroTCA a first approach}}
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{{GET_µTCA_ARCHI.pdf | Global µTCA architecture v1.0 GANIL/GAP September 9, 2009}}\\

===== Saclay Proposal : GET description =====
Here is a beginning of  GET description following all discussion we had. It is a preliminary document which will evolve until we reach a complete description of all the electronic functions we have to built for GET.

**This document is still largely incomplete and is expected to serve only a a basis for detailed technical discussions.**LOL

{{GET description v2.pdf | Saclay proposal for GET system   Frédéric Druillole & Shebli Anvar, February 24, 2009}}\\







===== Asic for GET (AGET) =====

  * **__[[ Aget_Proposal ]]__**
  * **__[[ Aget_Requirements ]]__**
  * **__[[ Aget_Document ]]__**

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===== ASic ADc (ASAD) =====
{{ASAD_logo.jpg}}\\
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{{Bx_TPC.ppt |  Electromechanics proposal including ASAD spatial distribution by J. Pibernat CENBG 2008,Dec,10}}
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{{AsAd_Specification.pdf | AsAd Specification}}\\
{{AsAd context.pdf | AsAd context}}\\
{{qse_qte_draw.pdf|High speed diff SAMTEC}}\\
{{samtec_caracterisation.pdf|samtec_caracterisation}}\\
{{eqdp.pdf|cable & connectors}}\\
{{VHDCI double.pdf|VHDCI double connectors}}\\

{{AsAd status.ppt|AsAd status.ppt}}\\
 * **__[[ AsAd_CoBo coupling documents ]]__**\\








===== Concentration Board (CoBo) =====

Specifications for the concentration board were discussed at the September 25th meeting.  Included in the slides from this meeting was a list of the components, connectors and functionality of the board.  A soft link to these files can be found [[ cobo_meeting_september_25_2008 | here]].
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The CoBo is responsible for applying a time stamp, zero suppression and compression algorithms to the data. These operations will be conducted within an FPGA that is housed on the board. Furthermore, the CoBo provides a communication interface between external devices and the ASAD. \\ 
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__Zero Suppression__: necessary to reduce the data volume to manageable levels; a factor of 10-100 rejection ratio is expected depending on the experimental applications. \\
__Time Stamping__: critical to reconstruction of zero suppressed data from multiple sources; the clock time will be provided by the Mutant module to each CoBo. \\
__Data Compression__: application of a peak fitting routine will allow only the signal amplitude, width and centre of gravity to be transmitted off the CoBo \\
__Multiplicity Integration__: sum the multiplicity signal over a sliding time window from each ASAD and transmit signal to MuTanT for trigger decision \\
__Trigger Signal Communication__: act as an intermediary to send trigger signal to the ASAD from the MuTanT \\
__Slow Controls Communication__: act as an intermediary to send slow controls signals to and from the ASAD \\
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To accomplish the specified tasks the CoBo card will consist primarily of a large memory FPGA chip, flash memory, RAM buffer, clock buffer and the requisite signal and power connectors. A rough layout of the required components is shown below. A Virtex 5 LXT development kit has been purchased to evaluate the FPGA programming required and aid in the board design. \\
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{{cobo_diagram_2009_06_01.jpg?800}}


{{cobo_specs_v1.pdf  | CoBo Specifications v1.0}}

{{cobotasks_090617.doc  | Break-down of CoBo development tasks and development timeline -- June 23, 2009}}

===== Integration Board (InBo) =====

{{CoBo_D_Rate.pdf  | CoBo to InBo/Ethernet data rate}}

===== Multiplicity, Trigger and Time Card (MuTanT) =====


{{xapp696.pdf  | Interfacing LVPECL 3.3V Drivers with 2.5V Differential Receivers}}

{{AND8059-D.pdf  | A Comparison of LVDS, CMOS, and ECL}}

{{MUTANT_SPECIF_V01.pdf  | A first level of specifications (draft version) --  G.Wittwer-GANIL, March 2, 2009}}

{{cable_15.pdf  | Proposed connectors from MUTANT to CoBo}}

{{MOLEX_15.pdf  | Proposed cables from MUTANT to CoBo}}

{{HONDA_HDRA_136.pdf  | Proposed connectors between MUTANT boards }}

===== Back End Module (BEM) =====




===== First Level Trigger ==============
{{TriggerTPC1.doc  | base of discussion for july 2008 on mainly asic specifications}}

{{How to build the multiplicity-2.pdf  | Proposal for digital multiplicity design}}

NOTE: see minutes from trigger meetings for an up-to-date discussion of the status of the trigger plans [[electronics#Meetings & Presentations| (link)]]


===== Software ==============

**This document is still largely incomplete and is expected to serve as a basis for detailed technical discussions.**

{{GET_sofware_Ganil_overview_v0.pdf | GANIL proposal for software general overview -- Frédéric Saillant, Bruno Raine, March 4, 2009}}

{{Minutes_GET_Software_2009_may_6.pdf | Minutes of GET software meeting, May 6, 2009}}


===== MicroTCA Information =====

Information provided by Performance Technologies Representative regarding MicroTCA applications and their product line is linked 

[[MicroTCA | here]].

Information on µTCA crates and MCH modules 

[[MicroTCA_MCH | here]]



===== Requirements for MSU Detector =====
{{santiago-3-2008.pdf |Wolfi's slides from ACTAR Meeting March, 2008}}

{{ElectronicsInfo_080428.pdf |Electronics Overview & Questions, Abby, April 29, 2008}}

{{timesequence128buckets_080430.ppt   | Event Time Sequence, Wolfi, May 1, 2008}}  

{{fpga_pipeline_080430.ppt | FPGA Pipeline, Nathan, May 1, 2008}}  

{{GanilTrip_080513.ppt | Structure of Data Flow, Nathan, May 13, 2008}}

{{pulsesimulationwmmay2008.doc | Pulse Simulation, Wolfi, May 14, 2008}} 

{{PhenixDataAcquisitionNotes_090723.doc | Data Acquisition Notes, Abby, July 23, 2009}}

===== Requirements for ACTAR Detector =====

  * This is the ACTAR document prepared for the Scientific Council of the IN2P3. It contains a description of the instrument (not detailed at this stage), with a list of desired performances. Some physics cases are elaborated in detail. Version as of 19/06/09
{{:actar_cs_in2p3.pdf|:actar_cs_in2p3.pdf}}


  * The following file summarized information about specification for MSU, CENBG and ACTAR TPC detectors. It is in Excell. It must be the first document to elaborate specification for new electronics. (Responsibility: F. Druillole)

{{:sizesystem_080603.xls|:sizesystem.xls}}


  * Below is the specifications file for the connector proposed by the Bordeaux group to be used between the pad plane and FEC.  The key to this connector is the small width.


{{:BordeauxProposedConnector.pdf|BordeauxProposedConnector.pdf}}

===== Examples from other TPC Projects =====
The following experiments provide examples of working electronics systems for TPC's.

[[T2K]] \\ 
[[STAR]] \\ 
[[ALICE]] \\
{{tpc.pdf | Two Protons Chase}} \\





===== Meetings & Presentations =====
[[http://www.usc.es/genp/Meetings/ACTAR08/ | ACTAR Collaboration Meeting, Santiago, March 10-11, 2008 ]]

[[Video Conference, May 15, 2008]]

[[Video Conference, June 3, 2008]]

[[ACTAR Collaboration Meeting, Bordeaux, June 16 - 18, 2008]]

[[Trigger Meeting, July 16, 2008]]

[[CoBo Meeting, September 25, 2008]]

[[Trigger Meeting, October 10, 2008]]

[[Trigger Meeting, November 18, 2008]]

[[ASAD Meeting, November 25, 2008]]

{{Minutes_GET_Software_2008_nov_25.doc | Software Meeting, November 25, 2008}}\\

[[ASAD Meeting, Feb 05, 2009]]

[[GET Collaboration Meeting, March 10-13, 2009]]

[[Informal Meeting, Grand Rapids, May 28, 2009]]

{{RIKEN Status20090924.ppt| Riken document}}\\
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[[GET Technical workshop Bordeaux, November 18-19, 2009]]


GET telephone meeting, March 15, 2010
{{:zap_integration_at-tpc_2010-3-15_x.pdf|ZAP integration for AT-TPC}}

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== Every 2 weeks meetings ==
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The second and fourth Tuesday of each month a visio/phone conference is held, from 14:00 to 16:00\\
Any person involved in the development of GET (Electro-Mechanic, Asad, Cobo, MUTANT, BEM, InBo, Data Acquisition) is cordially invited to participate.LOL\\
Please, follow the link for schedule and connection numbers.\\
[[Periodic meetings]]