Once triggered, the XLM starts the data acquisition cycle, to acquire data from the
MB. Following the external trigger XLM disables the discriminators on the chips to prevent any retriggering and sends a request for data to the motherboard. Each time the motherboard receives a request, it acknowledges it and sends out data from one channel. Address (i.e. which channel on which chip has fired) information is sent directly to the XLM, and time and energy information are sent to the FADC on separate double lemo cables. After a preset delay the XLM issues a clock signal to the FADC (XLM output 9 to FADC input 1). Upon receiving the clock signal, the FADC digitizes the time and energy information and stores it to its internal buffer.