This shows you the differences between two versions of the page.
Both sides previous revision Previous revision Next revision | Previous revision | ||
trigger [2015/10/20 12:42] pereira [Scalers and dead time] |
trigger [2023/10/24 16:47] (current) swartzj [Trigger schematics] |
||
---|---|---|---|
Line 36: | Line 36: | ||
===== Trigger schematics ===== | ===== Trigger schematics ===== | ||
- | The trigger schematic is shown on the Graphical User Interface (GUI) displayed in the figure below. The GUI is automatically displayed when clicking in the Readout icon of the [[software|u6pc5]] desktop. | + | The trigger schematic is shown on the Graphical User Interface (GUI) displayed in the figure below. The GUI is automatically displayed when clicking in the Readout icon of the [[software|u4pc8]] desktop. |
{{: | {{: | ||
Line 56: | Line 56: | ||
==== Inspect channels ==== | ==== Inspect channels ==== | ||
- | A set of four inspect channels are patched out to the data-U6 panels. Each channel can be assigned to any connection drawn on the GUI, thereby providing a convenient way to diagnose and adjust the timings at each step of the trigger circuit. | + | A set of four inspect channels are patched out to the data-U4 panels. Each channel can be assigned to any connection drawn on the GUI by right clicking on the corresponding drawn " |
Line 85: | Line 85: | ||
^ A4 (in) | External 2 source ^ B4 (out) | QDC gate ^ C4 (in) | Busy 4 ^ D4 (out) | External 2 source | | ^ A4 (in) | External 2 source ^ B4 (out) | QDC gate ^ C4 (in) | Busy 4 ^ D4 (out) | External 2 source | | ||
^ A5 (in) | Clear busy ^ B5 (out) | TDC start ^ C5 (in) | Busy 5 ^ D5 (out) | S800 trigger | | ^ A5 (in) | Clear busy ^ B5 (out) | TDC start ^ C5 (in) | Busy 5 ^ D5 (out) | S800 trigger | | ||
- | ^ A6 (in) | Clear module | + | ^ A6 (in) | Clear module |
^ A7 (in) | Gretina sync ^ B7 (out) | ^ C7 (in) | Busy 7 ^ D7 (out) | External 1 trigger | | ^ A7 (in) | Gretina sync ^ B7 (out) | ^ C7 (in) | Busy 7 ^ D7 (out) | External 1 trigger | | ||
^ A8 (in) | Time stamp clock ^ B8 (out) | Live trigger | ^ A8 (in) | Time stamp clock ^ B8 (out) | Live trigger | ||
Line 101: | Line 101: | ||
====== Time stamping ====== | ====== Time stamping ====== | ||
- | The S800 trigger provides a vetoed 10 MHz clock signal (derived from the 40 MHz FPGA clock) used for time stamping. An external clock can also be used, after selecting the appropriate check box in the [[Trigger# | + | The S800 ULM trigger |
- | The time stamping clock is available as an output that can be distributed to other time stamp modules, such as the one located in the S800 VME crate, or in other data acquisition systems coupled to the S800. | + | The time stamping clock is available as an output that can be distributed to other time stamp modules, such as the one located in the S800 VME crate (or in other data acquisition systems coupled to the S800). The S800 VME time-stamp module is implemented in a XLM72 (SpartanXL) FPGA. The schematics of the firmware is available {{: |
- | + | ||
- | + | ||
- | The time stamp module is implemented in a XLM72 (SpartanXL) FPGA. The schematics of the firmware is available {{: | + | |
Line 124: | Line 121: | ||
====== Configuration for S800 in tandem with other detectors ====== | ====== Configuration for S800 in tandem with other detectors ====== | ||
- | In its standard configuration, | + | In its standard configuration, |
To incorporate an external detector in the S800 trigger logic, the same busy and end-of-event signals are required from its data acquisition system. This is to ensure that no live trigger signal is generated when any of the partners is busy or still processing an event. The 5 signals necessary between the S800 trigger and an external data acquisition system are the following: | To incorporate an external detector in the S800 trigger logic, the same busy and end-of-event signals are required from its data acquisition system. This is to ensure that no live trigger signal is generated when any of the partners is busy or still processing an event. The 5 signals necessary between the S800 trigger and an external data acquisition system are the following: | ||
Line 159: | Line 156: | ||
====== Begin sequence ====== | ====== Begin sequence ====== | ||
+ | OBSOLETE: THIS SECTION IS BEING UPDATED | ||
+ | |||
The internal " | The internal " | ||
Line 170: | Line 169: | ||
====== Scalers and dead time ====== | ====== Scalers and dead time ====== | ||
- | The " | + | The " |
- | In addition, scalers are connected to the raw and live trigger signals. | + | For the determination of the dead time, both a free running and vetoed 10 kHz pulser signal are also connected to scalers. This is the preferred method because the pulser is not subject to possible double triggering effects like the raw trigger. |
- | The remining 16 scaler input channels (pins 17 to 32 in module) are connected to an ECL-NIM-ECL converter fed by a 16-channel | + | The remining 16 scaler input channels (pins 17 to 32 in module) are connected to an ECL-NIM-ECL converter fed by a 16-channel |
The complete list of scaler channels can be found [[Scaler Channel Description|here]]. | The complete list of scaler channels can be found [[Scaler Channel Description|here]]. |